PCIe Lanes: why it doesn’t make sense to recalculate them on a PC

by Kelvin
PCIe Lanes: why it doesn't make sense to recalculate them on a PC

The number of PCIe lanes on a processor has always been dependent on which lanes come directly from the PCIe root, providing full bandwidth and lowest possible latency to the processor. In modern systems, it is already built into the processor, whereas in older systems it was due to the northbridge; According to this metric, a standard Intel processor has 16 lanes, AMD Ryzen has 16 to 20, Intel HEDT has 28/44 depending on the model, and AMD Threadripper has up to 60. What’s all this for?

PCIe Lanes

What is the use of counting PCIe lanes?

Intel’s datasheet explicitly lists what is available on the processor via PCIe root complexes: here 44 lanes come from two groups of sixteen lanes and a complex of twelve lanes. DMI3 chipset connectivity is available on all but one PCIe 3.0 x4 lane, but is not included in this total.

  

Partitioning PCI Express Media

The number of PCIe lanes on the chipset is slightly different. Chipsets are PCIe switches for all practical purposes, as when using a limited bandwidth uplink, it is designed to carry traffic from low bandwidth controllers (such as SATA, Ethernet, or USB). For its part, AMD has limitations in this regard because it spent more time trying to re-enter the performance race against Intel than developing new technologies, and for that it actually outsourced ASMedia.

Intel has increased support for PCIe 3.0 lanes in its chipsets for at least three generations and now supports 24 PCIe 3.0 lanes. There are some caveats as to which bands the drivers might support, but we usually take those 24 as stated by the manufacturer into account.

Due to the shared uplink, PCIe lanes coming from the chipset (for both AMD and Intel) can be very easily blocked and also limited by PCIe 3.0 x4. The chipset introduces additional latency when compared to connecting the controller directly to the processor, so we rarely see important hardware (GPU / GPU, RAID controllers, FPGA, etc.) connected to them.

The combination of these two features provides a wide range of platform features and configurations. For example, the AMD X399 platform, which has 60 lines from the processor, has the following “recommended” settings:

Usage PCIe Lanes Total
Content creatorUse 2 GPU Pro
2 cache drives M.2
10G Ethernet
1 x U.2 storage
1 x M.2 OS / Apps
6 x SATA local backup
PCIe x16 / x16 from CPU lanes
x4 + x4 from cpu
x4 from cpu
x4 from cpu
x4 from cpu
from chipset
Total 52 stripes
Extreme computerUse 2 gaming GPUs
1 x HDMI capture card
2 x M.2 for gaming / streaming
10G Ethernet
1 x M.2 OS / Apps
6 x SATA local backup
PCIe x16 / x16 from CPU lanes
x8 from cpu
x4 + x4 from cpu
x4 from cpu
x4 from cpu
from chipset
Total 56 stripes
StreamerUse 1 gaming GPU
1 x HDMI capture card
2 x M.2 Stream / Transcoding
10G Ethernet
1 x U.2 storage
1 x M.2 OS / Apps
6 x SATA local backup
PCIe x16 from CPU lanes
x4 from cpu
x4 + x4 from cpu
x4 from cpu
x4 from cpu
x4 from cpu
from chipset
Total 40 stripes
Farm renderingUse 4 Vega FE Pro GPUs
2 cache drives M.2
1 x M.2 OS / Apps
6 x SATA local backup
PCIe x16 / x8 / x8 / x8 lanes
x4 + x4 from cpu
x4 from cpu
With chipset
Total 52 stripes

It started with companies bundling CPUs together and the PCIe lane of the chipset matters to provide more, even though not all lanes are the same or offer the same performance. … For manufacturers, this is very little important, because you already know that the “war of numbers” (see who offers the most of anything, whatever it is) is a common thing in marketing, the sole purpose of which is to sell more. As a result, Intel is also promoting its Skylake-X processors with 68 PCIe lanes, which are similar to those we showed for the AMD X399.

PCIe Lanes: why it doesn't make sense to recalculate them on a PC 3

PCIe bandwidth is misleading

Counting the number of PCIe lanes on a PC platform is misleading due to the simple fact that they are not all the same and do not serve the same purpose, and at best, because in many cases we have even seen falsified data (especially given the history of that as this metric has been provided in the past). The fact that the number is greater / less than expected by the provider does not give them the right to override it and mislead consumers, right?

To quote a precedent: in the smartphone space around 2016, manufacturers considered virtually everything on the main processor as an additional core to provide “the full number of cores.” This meant that CPU segments became “cores” as well as specific IP blocks for signal and image processing or IP blocks for security, with the result that quad-core processors were marketed as deca-cores as if they were.

PCIe Lanes: why it doesn't make sense to recalculate them on a PC 4

It would be absurd to hear or read that a smartphone processor has fifteen cores when the main general-purpose processor cores were the ARM quartet of Cortex A7 projects. Users who follow the development of the mobile phone industry will understand that this nonsense, fortunately, stopped rather quickly, since it was illogical to consider anything as a processor core, and if we continued in the same spirit today, we would have reached the absurdity of a smartphone. processors with 40 cores.

The same thing is starting to happen with PCIe lanes: if AMD, Intel and motherboard manufacturers start counting any lanes and any kind in their numbers, it will no longer make any sense.